Journal of VLSI Design and Signal Processing
https://www.matjournals.net/engineering/index.php/JOVDSP
<p><strong>JOVDSP</strong> is a peer reviewed journal in the discipline of Computer Science published by the MAT Journals Pvt. Ltd. It is a print and e-journal focused towards the rapid publication of fundamental research papers on all areas of VLSI Design and Signal Processing. VLSI Digital Signal Processing Systems-a unique, comprehensive guide to performance optimization techniques in VLSI signal processing.</p>en-USJournal of VLSI Design and Signal Processing2581-8449Hardware Trojan Detection in FPGA Using PUF-Based Authentication
https://www.matjournals.net/engineering/index.php/JOVDSP/article/view/4210
<p><em>Hardware Trojans (HTs) are a major threat to the security of a system due to the proliferation of the supply chain of integrated circuits. This study introduces a new detection system based on a 256-bit Physically Unclonable Function (PUF) combined with a SHA-256 hash to authenticate hardware. This scheme makes use of both device identification and design verification to offer a comprehensive solution for device cloning, IP tampering, and unauthorized structural changes. In this regard, the PUF utilizes the physical variation of the semiconductor devices caused by the manufacturing process to produce a unique response. The suggested system uses device-specific identity (PUF response) and design-specific integrity measures (resource utilization) to create an authentication tag. Any malicious intervention, e.g., the insertion of a hardware Trojan, changes the utilization of the resources and produces a hash mismatch, which can be easily detected as a Trojan. Firstly, the PUF-based identification will check for the uniqueness of the hardware device as well as its authenticity, offering protection against any kind of device cloning. Secondly, the SHA-256-based integrity check protects against tampering with the hardware design structure. Therefore, the proposed method can be considered a lightweight, efficient, and scalable solution for enhancing the security of hardware components along the entire IC lifecycle. Moreover, the above-mentioned system can be applied to security-sensitive scenarios such as FPGA architectures, System-on-Chip platforms, cryptographic processors, and Hardware Security Modules. The system is effective on Xilinx Zynq-7020 in both IP tampering and device cloning detection with a very low hardware overhead.</em></p>V. JeyalakshmiVaralakshmi PMohammed Siddique A
Copyright (c) 2026 Journal of VLSI Design and Signal Processing
2026-10-032026-10-0312311510.46610/JOVDSP.2026.v12i03.001Frequency-Aware Explainable Deepfake Video Detection Using Dual-Branch Deep Neural Networks: A Review
https://www.matjournals.net/engineering/index.php/JOVDSP/article/view/4391
<p><em>With the rapid development of autoencoder-, GAN-, and diffusion-based generative approaches, the artifacts resulting from deepfake video synthesis have reached a level that makes them nearly visually indistinguishable from authentic video, posing risks to society via misinformation and enabling identity theft or fraud. A recent, growing consensus is that any single visual feature alone is insufficient for detection of realistic synthetics; some purely spatial artifacts like blending seams and inconsistent pose might already have been skillfully removed during synthesis, while other frequency-domain traces stemming from, e.g., upsampling operators or decoders, remain, even when any pixel-level discrepancy is invisible. This led to the prevalent tendency towards dual or multi-branch networks to fuse spatial (RGB) data with frequency (FFT) data, often by harmoniously coordinating branches with cross-attention or adaptive-fusion modules. In parallel to this development, there is a significant and increasing enthusiasm for explainable AI (XAI) techniques, primarily Grad-CAM-like methods, which produce visually appealing rationales and contribute to making these detections accountable. This study presents a literature review on the most important works at the intersection of frequency-awareness, dual-branch fusion, and explainability in deepfake video detection. It establishes a taxonomy comprising pure spatial, pure frequency, and hybrid fusion methods; reviews important architectures (e.g., MesoNet, F3-Net, FreqNet-style dual branches, and fusion through cross-attention); compares them with values reported on FaceForensics++ and Celeb-DF (V2); reviews existing techniques to explain such detectors; and discusses remaining challenges. These challenges, such as generalization to new manipulation methods, sensitivity of frequency-information routing within the branches, overall computational efficiency, and the lack of XAI tailored to the dual-branch fusion mechanism itself, point toward directions for future work aimed at more integrated, intrinsically interpretable, frequency-aware dual-branch models.</em></p>Nikita Shivaji SheteSonali Rangdale
Copyright (c) 2026 Journal of VLSI Design and Signal Processing
2026-10-312026-10-311231629